1. Field of the Invention
The present invention is related to memory applications and, in particular, to buffered DRAMs.
2. Discussion of Related Art
Dual In-Line Memory Modules (DIMMs) have become the industry standard for supplying random access memory (RAM) for computer applications. Each DIMM is typically a printed circuit board that includes a number of individual RAM chips. The RAM chips can be any memory chips, for example dynamic RAM (DRAM) chips or synchronous RAM (SRAM) chips. In some cases, the DIMM functions as a double data rate DIMM (DDR DIMM) where data is received both on the rising edge of the clock signal and on the falling edge of the clock signal.
As the demand for memory density increases, DIMM packages that contain a higher density of RAM chips become important. One such DIMM package is a registered DIMM package (RDIMM). In an RDIMM, address bits received on the address lines are registered in one or more registers before being presented to the RAM chips. The register acts as an electrical buffer, distributing the received memory address bits to each of the RDIMM RAM chips. As discussed above, DDR RDIMM packages receive data and address signals on both the rising and falling edges of the clock signal.
As the frequency of DIMM activity increases, which is especially true for a DDR RDIMM with DRAM, the data bus loading by DRAMs coupled to the DIMM can limit the possible memory density that DIMMs are able to achieve. As the frequency of DDR RDIMM increases, the allowed number of data loads, which corresponds to the number of RAM chips in the DIMM, is decreasing. As a partial solution to this problem, some manufacturers are utilizing a fully-buffered DIMM module with external discrete data buffers located in the DIMM itself, which can occupy considerable space in the DIMM.
However, there is a need to allow higher frequency DIMM configurations while still increasing the density of RAM chips.